//- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
// The confidential and proprietary information contained in this file may     
// only be used by a person authorised under and to the extent permitted       
// by a subsisting licensing agreement from ARM Limited.                       
//                                                                             
//            (C) COPYRIGHT 2005-2013 ARM Limited.
//                ALL RIGHTS RESERVED                                          
//                                                                             
// This entire notice must be reproduced on all copies of this file            
// and copies of this file may only be made by a person if such person is      
// permitted to do so under the terms of a subsisting license agreement        
// from ARM Limited.                                                           
//                                                                             
//- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
// Top-Level Verilog file is auto-generated by AMBA Designer ADr3p4-00rel0-build-0086
//                                                                             
// Stitcher: generic_stitcher_core v3.1, built on Sep 18 2013
//                                                                             
// Filename: nic400_cd_clk_peri_25m_ysyx_rv32.v
// Created : Mon May 27 20:11:32 2024                            
//                                                                             
//- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
// Generated with Validator version0.1


//-----------------------------------------------------------------------------
// Module Declaration nic400_cd_clk_peri_25m_ysyx_rv32
//-----------------------------------------------------------------------------

module nic400_cd_clk_peri_25m_ysyx_rv32 (
  
// Instance: u_amib_chiplink_slv_axi4_tpv, Port: chiplink_slv_axi4_tpv_m

  awid_chiplink_slv_axi4_tpv,
  awaddr_chiplink_slv_axi4_tpv,
  awlen_chiplink_slv_axi4_tpv,
  awsize_chiplink_slv_axi4_tpv,
  awburst_chiplink_slv_axi4_tpv,
  awlock_chiplink_slv_axi4_tpv,
  awcache_chiplink_slv_axi4_tpv,
  awprot_chiplink_slv_axi4_tpv,
  awvalid_chiplink_slv_axi4_tpv,
  awready_chiplink_slv_axi4_tpv,
  wdata_chiplink_slv_axi4_tpv,
  wstrb_chiplink_slv_axi4_tpv,
  wlast_chiplink_slv_axi4_tpv,
  wvalid_chiplink_slv_axi4_tpv,
  wready_chiplink_slv_axi4_tpv,
  bid_chiplink_slv_axi4_tpv,
  bresp_chiplink_slv_axi4_tpv,
  bvalid_chiplink_slv_axi4_tpv,
  bready_chiplink_slv_axi4_tpv,
  arid_chiplink_slv_axi4_tpv,
  araddr_chiplink_slv_axi4_tpv,
  arlen_chiplink_slv_axi4_tpv,
  arsize_chiplink_slv_axi4_tpv,
  arburst_chiplink_slv_axi4_tpv,
  arlock_chiplink_slv_axi4_tpv,
  arcache_chiplink_slv_axi4_tpv,
  arprot_chiplink_slv_axi4_tpv,
  arvalid_chiplink_slv_axi4_tpv,
  arready_chiplink_slv_axi4_tpv,
  rid_chiplink_slv_axi4_tpv,
  rdata_chiplink_slv_axi4_tpv,
  rresp_chiplink_slv_axi4_tpv,
  rlast_chiplink_slv_axi4_tpv,
  rvalid_chiplink_slv_axi4_tpv,
  rready_chiplink_slv_axi4_tpv,
  
// Instance: u_amib_tpv_gp_apb4, Port: spfs_slv_apb4_tpv

  paddr_spfs_slv_apb4_tpv,
  pwdata_spfs_slv_apb4_tpv,
  pwrite_spfs_slv_apb4_tpv,
  pprot_spfs_slv_apb4_tpv,
  pstrb_spfs_slv_apb4_tpv,
  penable_spfs_slv_apb4_tpv,
  pselx_spfs_slv_apb4_tpv,
  prdata_spfs_slv_apb4_tpv,
  pslverr_spfs_slv_apb4_tpv,
  pready_spfs_slv_apb4_tpv,
  
// Instance: u_amib_tpv_gp_apb4, Port: uart_slv_apb4_tpv

  paddr_uart_slv_apb4_tpv,
  pwdata_uart_slv_apb4_tpv,
  pwrite_uart_slv_apb4_tpv,
  pprot_uart_slv_apb4_tpv,
  pstrb_uart_slv_apb4_tpv,
  penable_uart_slv_apb4_tpv,
  pselx_uart_slv_apb4_tpv,
  prdata_uart_slv_apb4_tpv,
  pslverr_uart_slv_apb4_tpv,
  pready_uart_slv_apb4_tpv,
  
// Instance: u_ib_chiplink_slv_axi4_tpv_ib_m, Port: chiplink_slv_axi4_tpv_ib_s_async

  aw_data_chiplink_slv_axi4_tpv_ib_int_async,
  aw_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async,
  aw_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async,
  aw_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async,
  b_data_chiplink_slv_axi4_tpv_ib_int_async,
  b_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async,
  b_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async,
  b_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async,
  ar_data_chiplink_slv_axi4_tpv_ib_int_async,
  ar_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async,
  ar_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async,
  ar_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async,
  r_data_chiplink_slv_axi4_tpv_ib_int_async,
  r_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async,
  r_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async,
  r_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async,
  w_data_chiplink_slv_axi4_tpv_ib_int_async,
  w_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async,
  w_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async,
  w_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async,
  
// Instance: u_ib_dma_axi4_cpu_ib_s, Port: axi4_s

  awid_dma_axi4_cpu_s,
  awaddr_dma_axi4_cpu_s,
  awlen_dma_axi4_cpu_s,
  awsize_dma_axi4_cpu_s,
  awburst_dma_axi4_cpu_s,
  awlock_dma_axi4_cpu_s,
  awcache_dma_axi4_cpu_s,
  awprot_dma_axi4_cpu_s,
  awvalid_dma_axi4_cpu_s,
  awready_dma_axi4_cpu_s,
  wdata_dma_axi4_cpu_s,
  wstrb_dma_axi4_cpu_s,
  wlast_dma_axi4_cpu_s,
  wvalid_dma_axi4_cpu_s,
  wready_dma_axi4_cpu_s,
  bid_dma_axi4_cpu_s,
  bresp_dma_axi4_cpu_s,
  bvalid_dma_axi4_cpu_s,
  bready_dma_axi4_cpu_s,
  arid_dma_axi4_cpu_s,
  araddr_dma_axi4_cpu_s,
  arlen_dma_axi4_cpu_s,
  arsize_dma_axi4_cpu_s,
  arburst_dma_axi4_cpu_s,
  arlock_dma_axi4_cpu_s,
  arcache_dma_axi4_cpu_s,
  arprot_dma_axi4_cpu_s,
  arvalid_dma_axi4_cpu_s,
  arready_dma_axi4_cpu_s,
  rid_dma_axi4_cpu_s,
  rdata_dma_axi4_cpu_s,
  rresp_dma_axi4_cpu_s,
  rlast_dma_axi4_cpu_s,
  rvalid_dma_axi4_cpu_s,
  rready_dma_axi4_cpu_s,
  
// Instance: u_ib_dma_axi4_cpu_ib_s, Port: dma_axi4_cpu_ib_m_async

  aw_data_dma_axi4_cpu_ib_int_async,
  aw_rpntr_gry_dma_axi4_cpu_ib_int_async,
  aw_rpntr_bin_dma_axi4_cpu_ib_int_async,
  aw_wpntr_gry_dma_axi4_cpu_ib_int_async,
  b_data_dma_axi4_cpu_ib_int_async,
  b_rpntr_gry_dma_axi4_cpu_ib_int_async,
  b_rpntr_bin_dma_axi4_cpu_ib_int_async,
  b_wpntr_gry_dma_axi4_cpu_ib_int_async,
  ar_data_dma_axi4_cpu_ib_int_async,
  ar_rpntr_gry_dma_axi4_cpu_ib_int_async,
  ar_rpntr_bin_dma_axi4_cpu_ib_int_async,
  ar_wpntr_gry_dma_axi4_cpu_ib_int_async,
  r_data_dma_axi4_cpu_ib_int_async,
  r_rpntr_gry_dma_axi4_cpu_ib_int_async,
  r_rpntr_bin_dma_axi4_cpu_ib_int_async,
  r_wpntr_gry_dma_axi4_cpu_ib_int_async,
  w_data_dma_axi4_cpu_ib_int_async,
  w_rpntr_gry_dma_axi4_cpu_ib_int_async,
  w_rpntr_bin_dma_axi4_cpu_ib_int_async,
  w_wpntr_gry_dma_axi4_cpu_ib_int_async,
  
// Instance: u_ib_tpv_gp_apb4_ib_m, Port: tpv_gp_apb4_ib_s_async

  a_data_tpv_gp_apb4_ib_int_async,
  a_rpntr_gry_tpv_gp_apb4_ib_int_async,
  a_rpntr_bin_tpv_gp_apb4_ib_int_async,
  a_wpntr_gry_tpv_gp_apb4_ib_int_async,
  d_data_tpv_gp_apb4_ib_int_async,
  d_rpntr_gry_tpv_gp_apb4_ib_int_async,
  d_rpntr_bin_tpv_gp_apb4_ib_int_async,
  d_wpntr_gry_tpv_gp_apb4_ib_int_async,
  w_data_tpv_gp_apb4_ib_int_async,
  w_rpntr_gry_tpv_gp_apb4_ib_int_async,
  w_rpntr_bin_tpv_gp_apb4_ib_int_async,
  w_wpntr_gry_tpv_gp_apb4_ib_int_async,
  
// Instance: u_tpv_gp_apb4_i2s_slv_apb4_bsd_async, Port: apb_int_async

  preq_i2s_slv_apb4_int_slave_async,
  pack_i2s_slv_apb4_int_slave_async,
  pfwdpayld_i2s_slv_apb4_int_slave_async,
  prevpayld_i2s_slv_apb4_int_slave_async,

//  Non-bus signals

  clk_peri_25mclk,
  clk_peri_25mclken,
  clk_peri_25mresetn

);



//-----------------------------------------------------------------------------
// Port Declarations
//-----------------------------------------------------------------------------


// Instance: u_amib_chiplink_slv_axi4_tpv, Port: chiplink_slv_axi4_tpv_m

output [3:0]  awid_chiplink_slv_axi4_tpv;
output [31:0] awaddr_chiplink_slv_axi4_tpv;
output [7:0]  awlen_chiplink_slv_axi4_tpv;
output [2:0]  awsize_chiplink_slv_axi4_tpv;
output [1:0]  awburst_chiplink_slv_axi4_tpv;
output        awlock_chiplink_slv_axi4_tpv;
output [3:0]  awcache_chiplink_slv_axi4_tpv;
output [2:0]  awprot_chiplink_slv_axi4_tpv;
output        awvalid_chiplink_slv_axi4_tpv;
input         awready_chiplink_slv_axi4_tpv;
output [63:0] wdata_chiplink_slv_axi4_tpv;
output [7:0]  wstrb_chiplink_slv_axi4_tpv;
output        wlast_chiplink_slv_axi4_tpv;
output        wvalid_chiplink_slv_axi4_tpv;
input         wready_chiplink_slv_axi4_tpv;
input  [3:0]  bid_chiplink_slv_axi4_tpv;
input  [1:0]  bresp_chiplink_slv_axi4_tpv;
input         bvalid_chiplink_slv_axi4_tpv;
output        bready_chiplink_slv_axi4_tpv;
output [3:0]  arid_chiplink_slv_axi4_tpv;
output [31:0] araddr_chiplink_slv_axi4_tpv;
output [7:0]  arlen_chiplink_slv_axi4_tpv;
output [2:0]  arsize_chiplink_slv_axi4_tpv;
output [1:0]  arburst_chiplink_slv_axi4_tpv;
output        arlock_chiplink_slv_axi4_tpv;
output [3:0]  arcache_chiplink_slv_axi4_tpv;
output [2:0]  arprot_chiplink_slv_axi4_tpv;
output        arvalid_chiplink_slv_axi4_tpv;
input         arready_chiplink_slv_axi4_tpv;
input  [3:0]  rid_chiplink_slv_axi4_tpv;
input  [63:0] rdata_chiplink_slv_axi4_tpv;
input  [1:0]  rresp_chiplink_slv_axi4_tpv;
input         rlast_chiplink_slv_axi4_tpv;
input         rvalid_chiplink_slv_axi4_tpv;
output        rready_chiplink_slv_axi4_tpv;

// Instance: u_amib_tpv_gp_apb4, Port: spfs_slv_apb4_tpv

output [31:0] paddr_spfs_slv_apb4_tpv;
output [31:0] pwdata_spfs_slv_apb4_tpv;
output        pwrite_spfs_slv_apb4_tpv;
output [2:0]  pprot_spfs_slv_apb4_tpv;
output [3:0]  pstrb_spfs_slv_apb4_tpv;
output        penable_spfs_slv_apb4_tpv;
output        pselx_spfs_slv_apb4_tpv;
input  [31:0] prdata_spfs_slv_apb4_tpv;
input         pslverr_spfs_slv_apb4_tpv;
input         pready_spfs_slv_apb4_tpv;

// Instance: u_amib_tpv_gp_apb4, Port: uart_slv_apb4_tpv

output [31:0] paddr_uart_slv_apb4_tpv;
output [31:0] pwdata_uart_slv_apb4_tpv;
output        pwrite_uart_slv_apb4_tpv;
output [2:0]  pprot_uart_slv_apb4_tpv;
output [3:0]  pstrb_uart_slv_apb4_tpv;
output        penable_uart_slv_apb4_tpv;
output        pselx_uart_slv_apb4_tpv;
input  [31:0] prdata_uart_slv_apb4_tpv;
input         pslverr_uart_slv_apb4_tpv;
input         pready_uart_slv_apb4_tpv;

// Instance: u_ib_chiplink_slv_axi4_tpv_ib_m, Port: chiplink_slv_axi4_tpv_ib_s_async

input  [60:0] aw_data_chiplink_slv_axi4_tpv_ib_int_async;
output [1:0]  aw_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
output        aw_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async;
input  [1:0]  aw_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
output [5:0]  b_data_chiplink_slv_axi4_tpv_ib_int_async;
input  [1:0]  b_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
input         b_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async;
output [1:0]  b_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
input  [60:0] ar_data_chiplink_slv_axi4_tpv_ib_int_async;
output [1:0]  ar_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
output        ar_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async;
input  [1:0]  ar_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
output [70:0] r_data_chiplink_slv_axi4_tpv_ib_int_async;
input  [1:0]  r_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
input         r_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async;
output [1:0]  r_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
input  [72:0] w_data_chiplink_slv_axi4_tpv_ib_int_async;
output [1:0]  w_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
output        w_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async;
input  [1:0]  w_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;

// Instance: u_ib_dma_axi4_cpu_ib_s, Port: axi4_s

input  [3:0]  awid_dma_axi4_cpu_s;
input  [31:0] awaddr_dma_axi4_cpu_s;
input  [7:0]  awlen_dma_axi4_cpu_s;
input  [2:0]  awsize_dma_axi4_cpu_s;
input  [1:0]  awburst_dma_axi4_cpu_s;
input         awlock_dma_axi4_cpu_s;
input  [3:0]  awcache_dma_axi4_cpu_s;
input  [2:0]  awprot_dma_axi4_cpu_s;
input         awvalid_dma_axi4_cpu_s;
output        awready_dma_axi4_cpu_s;
input  [63:0] wdata_dma_axi4_cpu_s;
input  [7:0]  wstrb_dma_axi4_cpu_s;
input         wlast_dma_axi4_cpu_s;
input         wvalid_dma_axi4_cpu_s;
output        wready_dma_axi4_cpu_s;
output [3:0]  bid_dma_axi4_cpu_s;
output [1:0]  bresp_dma_axi4_cpu_s;
output        bvalid_dma_axi4_cpu_s;
input         bready_dma_axi4_cpu_s;
input  [3:0]  arid_dma_axi4_cpu_s;
input  [31:0] araddr_dma_axi4_cpu_s;
input  [7:0]  arlen_dma_axi4_cpu_s;
input  [2:0]  arsize_dma_axi4_cpu_s;
input  [1:0]  arburst_dma_axi4_cpu_s;
input         arlock_dma_axi4_cpu_s;
input  [3:0]  arcache_dma_axi4_cpu_s;
input  [2:0]  arprot_dma_axi4_cpu_s;
input         arvalid_dma_axi4_cpu_s;
output        arready_dma_axi4_cpu_s;
output [3:0]  rid_dma_axi4_cpu_s;
output [63:0] rdata_dma_axi4_cpu_s;
output [1:0]  rresp_dma_axi4_cpu_s;
output        rlast_dma_axi4_cpu_s;
output        rvalid_dma_axi4_cpu_s;
input         rready_dma_axi4_cpu_s;

// Instance: u_ib_dma_axi4_cpu_ib_s, Port: dma_axi4_cpu_ib_m_async

output [57:0] aw_data_dma_axi4_cpu_ib_int_async;
input  [1:0]  aw_rpntr_gry_dma_axi4_cpu_ib_int_async;
input         aw_rpntr_bin_dma_axi4_cpu_ib_int_async;
output [1:0]  aw_wpntr_gry_dma_axi4_cpu_ib_int_async;
input  [5:0]  b_data_dma_axi4_cpu_ib_int_async;
output [1:0]  b_rpntr_gry_dma_axi4_cpu_ib_int_async;
output        b_rpntr_bin_dma_axi4_cpu_ib_int_async;
input  [1:0]  b_wpntr_gry_dma_axi4_cpu_ib_int_async;
output [68:0] ar_data_dma_axi4_cpu_ib_int_async;
input  [1:0]  ar_rpntr_gry_dma_axi4_cpu_ib_int_async;
input         ar_rpntr_bin_dma_axi4_cpu_ib_int_async;
output [1:0]  ar_wpntr_gry_dma_axi4_cpu_ib_int_async;
input  [72:0] r_data_dma_axi4_cpu_ib_int_async;
output [1:0]  r_rpntr_gry_dma_axi4_cpu_ib_int_async;
output        r_rpntr_bin_dma_axi4_cpu_ib_int_async;
input  [1:0]  r_wpntr_gry_dma_axi4_cpu_ib_int_async;
output [72:0] w_data_dma_axi4_cpu_ib_int_async;
input  [1:0]  w_rpntr_gry_dma_axi4_cpu_ib_int_async;
input         w_rpntr_bin_dma_axi4_cpu_ib_int_async;
output [1:0]  w_wpntr_gry_dma_axi4_cpu_ib_int_async;

// Instance: u_ib_tpv_gp_apb4_ib_m, Port: tpv_gp_apb4_ib_s_async

input  [61:0] a_data_tpv_gp_apb4_ib_int_async;
output [1:0]  a_rpntr_gry_tpv_gp_apb4_ib_int_async;
output        a_rpntr_bin_tpv_gp_apb4_ib_int_async;
input  [1:0]  a_wpntr_gry_tpv_gp_apb4_ib_int_async;
output [39:0] d_data_tpv_gp_apb4_ib_int_async;
input  [1:0]  d_rpntr_gry_tpv_gp_apb4_ib_int_async;
input         d_rpntr_bin_tpv_gp_apb4_ib_int_async;
output [1:0]  d_wpntr_gry_tpv_gp_apb4_ib_int_async;
input  [36:0] w_data_tpv_gp_apb4_ib_int_async;
output [1:0]  w_rpntr_gry_tpv_gp_apb4_ib_int_async;
output        w_rpntr_bin_tpv_gp_apb4_ib_int_async;
input  [1:0]  w_wpntr_gry_tpv_gp_apb4_ib_int_async;

// Instance: u_tpv_gp_apb4_i2s_slv_apb4_bsd_async, Port: apb_int_async

output        preq_i2s_slv_apb4_int_slave_async;
input         pack_i2s_slv_apb4_int_slave_async;
output [71:0] pfwdpayld_i2s_slv_apb4_int_slave_async;
input  [32:0] prevpayld_i2s_slv_apb4_int_slave_async;

//  Non-bus signals

input         clk_peri_25mclk;
input         clk_peri_25mclken;
input         clk_peri_25mresetn;



//-----------------------------------------------------------------------------
// Internal Wire Declarations
//-----------------------------------------------------------------------------

wire           a_rpntr_bin_tpv_gp_apb4_ib_int_async;
wire   [1:0]   a_rpntr_gry_tpv_gp_apb4_ib_int_async;
wire   [68:0]  ar_data_dma_axi4_cpu_ib_int_async;
wire           ar_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async;
wire   [1:0]   ar_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
wire   [1:0]   ar_wpntr_gry_dma_axi4_cpu_ib_int_async;
wire   [31:0]  araddr_chiplink_slv_axi4_tpv;
wire   [1:0]   arburst_chiplink_slv_axi4_tpv;
wire   [3:0]   arcache_chiplink_slv_axi4_tpv;
wire   [3:0]   arid_chiplink_slv_axi4_tpv;
wire   [7:0]   arlen_chiplink_slv_axi4_tpv;
wire           arlock_chiplink_slv_axi4_tpv;
wire   [2:0]   arprot_chiplink_slv_axi4_tpv;
wire           arready_dma_axi4_cpu_s;
wire   [2:0]   arsize_chiplink_slv_axi4_tpv;
wire           arvalid_chiplink_slv_axi4_tpv;
wire   [57:0]  aw_data_dma_axi4_cpu_ib_int_async;
wire           aw_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async;
wire   [1:0]   aw_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
wire   [1:0]   aw_wpntr_gry_dma_axi4_cpu_ib_int_async;
wire   [31:0]  awaddr_chiplink_slv_axi4_tpv;
wire   [1:0]   awburst_chiplink_slv_axi4_tpv;
wire   [3:0]   awcache_chiplink_slv_axi4_tpv;
wire   [3:0]   awid_chiplink_slv_axi4_tpv;
wire   [7:0]   awlen_chiplink_slv_axi4_tpv;
wire           awlock_chiplink_slv_axi4_tpv;
wire   [2:0]   awprot_chiplink_slv_axi4_tpv;
wire           awready_dma_axi4_cpu_s;
wire   [2:0]   awsize_chiplink_slv_axi4_tpv;
wire           awvalid_chiplink_slv_axi4_tpv;
wire   [5:0]   b_data_chiplink_slv_axi4_tpv_ib_int_async;
wire           b_rpntr_bin_dma_axi4_cpu_ib_int_async;
wire   [1:0]   b_rpntr_gry_dma_axi4_cpu_ib_int_async;
wire   [1:0]   b_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
wire   [3:0]   bid_dma_axi4_cpu_s;
wire           bready_chiplink_slv_axi4_tpv;
wire   [1:0]   bresp_dma_axi4_cpu_s;
wire           bvalid_dma_axi4_cpu_s;
wire   [39:0]  d_data_tpv_gp_apb4_ib_int_async;
wire   [1:0]   d_wpntr_gry_tpv_gp_apb4_ib_int_async;
wire   [31:0]  paddr_spfs_slv_apb4_tpv;
wire   [31:0]  paddr_uart_slv_apb4_tpv;
wire           penable_spfs_slv_apb4_tpv;
wire           penable_uart_slv_apb4_tpv;
wire   [71:0]  pfwdpayld_i2s_slv_apb4_int_slave_async;
wire   [2:0]   pprot_spfs_slv_apb4_tpv;
wire   [2:0]   pprot_uart_slv_apb4_tpv;
wire           preq_i2s_slv_apb4_int_slave_async;
wire           pselx_spfs_slv_apb4_tpv;
wire           pselx_uart_slv_apb4_tpv;
wire   [3:0]   pstrb_spfs_slv_apb4_tpv;
wire   [3:0]   pstrb_uart_slv_apb4_tpv;
wire   [31:0]  pwdata_spfs_slv_apb4_tpv;
wire   [31:0]  pwdata_uart_slv_apb4_tpv;
wire           pwrite_spfs_slv_apb4_tpv;
wire           pwrite_uart_slv_apb4_tpv;
wire   [70:0]  r_data_chiplink_slv_axi4_tpv_ib_int_async;
wire           r_rpntr_bin_dma_axi4_cpu_ib_int_async;
wire   [1:0]   r_rpntr_gry_dma_axi4_cpu_ib_int_async;
wire   [1:0]   r_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
wire   [63:0]  rdata_dma_axi4_cpu_s;
wire   [3:0]   rid_dma_axi4_cpu_s;
wire           rlast_dma_axi4_cpu_s;
wire           rready_chiplink_slv_axi4_tpv;
wire   [1:0]   rresp_dma_axi4_cpu_s;
wire           rvalid_dma_axi4_cpu_s;
wire   [72:0]  w_data_dma_axi4_cpu_ib_int_async;
wire           w_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async;
wire           w_rpntr_bin_tpv_gp_apb4_ib_int_async;
wire   [1:0]   w_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
wire   [1:0]   w_rpntr_gry_tpv_gp_apb4_ib_int_async;
wire   [1:0]   w_wpntr_gry_dma_axi4_cpu_ib_int_async;
wire   [63:0]  wdata_chiplink_slv_axi4_tpv;
wire           wlast_chiplink_slv_axi4_tpv;
wire           wready_dma_axi4_cpu_s;
wire   [7:0]   wstrb_chiplink_slv_axi4_tpv;
wire           wvalid_chiplink_slv_axi4_tpv;
wire           arready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           awready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [3:0]   bid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [1:0]   bresp_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           bvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [63:0]  rdata_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [3:0]   rid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           rlast_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [1:0]   rresp_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           rvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           wready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           aready_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire           dbnr_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [31:0]  ddata_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [3:0]   did_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire           dlast_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [1:0]   dresp_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire           dvalid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [31:0]  paddr_tpv_gp_apb4_i2s_slv_apb4_bridge;
wire           penable_tpv_gp_apb4_i2s_slv_apb4_bridge;
wire   [2:0]   pprot_tpv_gp_apb4_i2s_slv_apb4_bridge;
wire           pselx_tpv_gp_apb4_i2s_slv_apb4_bridge;
wire   [3:0]   pstrb_tpv_gp_apb4_i2s_slv_apb4_bridge;
wire   [31:0]  pwdata_tpv_gp_apb4_i2s_slv_apb4_bridge;
wire           pwrite_tpv_gp_apb4_i2s_slv_apb4_bridge;
wire           wready_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [31:0]  araddr_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [1:0]   arburst_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [3:0]   arcache_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [3:0]   arid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [7:0]   arlen_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           arlock_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [2:0]   arprot_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [2:0]   arsize_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           arvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [31:0]  awaddr_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [1:0]   awburst_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [3:0]   awcache_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [3:0]   awid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [7:0]   awlen_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           awlock_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [2:0]   awprot_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [2:0]   awsize_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           awvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           bready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           rready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [63:0]  wdata_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           wlast_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [7:0]   wstrb_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire           wvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s;
wire   [31:0]  aaddr_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [1:0]   aburst_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [3:0]   acache_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [3:0]   aid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [7:0]   alen_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire           alock_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [2:0]   aprot_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [3:0]   aregion_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [2:0]   asize_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire           avalid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire           awrite_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire           dready_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [31:0]  wdata_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire           wlast_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [3:0]   wstrb_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire           wvalid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s;
wire   [31:0]  prdata_tpv_gp_apb4_i2s_slv_apb4_bridge;
wire           pready_tpv_gp_apb4_i2s_slv_apb4_bridge;
wire           pslverr_tpv_gp_apb4_i2s_slv_apb4_bridge;
wire   [61:0]  a_data_tpv_gp_apb4_ib_int_async;
wire   [1:0]   a_wpntr_gry_tpv_gp_apb4_ib_int_async;
wire   [60:0]  ar_data_chiplink_slv_axi4_tpv_ib_int_async;
wire           ar_rpntr_bin_dma_axi4_cpu_ib_int_async;
wire   [1:0]   ar_rpntr_gry_dma_axi4_cpu_ib_int_async;
wire   [1:0]   ar_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
wire   [31:0]  araddr_dma_axi4_cpu_s;
wire   [1:0]   arburst_dma_axi4_cpu_s;
wire   [3:0]   arcache_dma_axi4_cpu_s;
wire   [3:0]   arid_dma_axi4_cpu_s;
wire   [7:0]   arlen_dma_axi4_cpu_s;
wire           arlock_dma_axi4_cpu_s;
wire   [2:0]   arprot_dma_axi4_cpu_s;
wire           arready_chiplink_slv_axi4_tpv;
wire   [2:0]   arsize_dma_axi4_cpu_s;
wire           arvalid_dma_axi4_cpu_s;
wire   [60:0]  aw_data_chiplink_slv_axi4_tpv_ib_int_async;
wire           aw_rpntr_bin_dma_axi4_cpu_ib_int_async;
wire   [1:0]   aw_rpntr_gry_dma_axi4_cpu_ib_int_async;
wire   [1:0]   aw_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
wire   [31:0]  awaddr_dma_axi4_cpu_s;
wire   [1:0]   awburst_dma_axi4_cpu_s;
wire   [3:0]   awcache_dma_axi4_cpu_s;
wire   [3:0]   awid_dma_axi4_cpu_s;
wire   [7:0]   awlen_dma_axi4_cpu_s;
wire           awlock_dma_axi4_cpu_s;
wire   [2:0]   awprot_dma_axi4_cpu_s;
wire           awready_chiplink_slv_axi4_tpv;
wire   [2:0]   awsize_dma_axi4_cpu_s;
wire           awvalid_dma_axi4_cpu_s;
wire   [5:0]   b_data_dma_axi4_cpu_ib_int_async;
wire           b_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async;
wire   [1:0]   b_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
wire   [1:0]   b_wpntr_gry_dma_axi4_cpu_ib_int_async;
wire   [3:0]   bid_chiplink_slv_axi4_tpv;
wire           bready_dma_axi4_cpu_s;
wire   [1:0]   bresp_chiplink_slv_axi4_tpv;
wire           bvalid_chiplink_slv_axi4_tpv;
wire           clk_peri_25mclk;
wire           clk_peri_25mclken;
wire           clk_peri_25mresetn;
wire           d_rpntr_bin_tpv_gp_apb4_ib_int_async;
wire   [1:0]   d_rpntr_gry_tpv_gp_apb4_ib_int_async;
wire           pack_i2s_slv_apb4_int_slave_async;
wire   [31:0]  prdata_spfs_slv_apb4_tpv;
wire   [31:0]  prdata_uart_slv_apb4_tpv;
wire           pready_spfs_slv_apb4_tpv;
wire           pready_uart_slv_apb4_tpv;
wire   [32:0]  prevpayld_i2s_slv_apb4_int_slave_async;
wire           pslverr_spfs_slv_apb4_tpv;
wire           pslverr_uart_slv_apb4_tpv;
wire   [72:0]  r_data_dma_axi4_cpu_ib_int_async;
wire           r_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async;
wire   [1:0]   r_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
wire   [1:0]   r_wpntr_gry_dma_axi4_cpu_ib_int_async;
wire   [63:0]  rdata_chiplink_slv_axi4_tpv;
wire   [3:0]   rid_chiplink_slv_axi4_tpv;
wire           rlast_chiplink_slv_axi4_tpv;
wire           rready_dma_axi4_cpu_s;
wire   [1:0]   rresp_chiplink_slv_axi4_tpv;
wire           rvalid_chiplink_slv_axi4_tpv;
wire   [72:0]  w_data_chiplink_slv_axi4_tpv_ib_int_async;
wire   [36:0]  w_data_tpv_gp_apb4_ib_int_async;
wire           w_rpntr_bin_dma_axi4_cpu_ib_int_async;
wire   [1:0]   w_rpntr_gry_dma_axi4_cpu_ib_int_async;
wire   [1:0]   w_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async;
wire   [1:0]   w_wpntr_gry_tpv_gp_apb4_ib_int_async;
wire   [63:0]  wdata_dma_axi4_cpu_s;
wire           wlast_dma_axi4_cpu_s;
wire           wready_chiplink_slv_axi4_tpv;
wire   [7:0]   wstrb_dma_axi4_cpu_s;
wire           wvalid_dma_axi4_cpu_s;



//-----------------------------------------------------------------------------
// Sub-Modules Instantiation
//-----------------------------------------------------------------------------

nic400_amib_chiplink_slv_axi4_tpv_ysyx_rv32     u_amib_chiplink_slv_axi4_tpv (
  .awid_chiplink_slv_axi4_tpv_m (awid_chiplink_slv_axi4_tpv),
  .awaddr_chiplink_slv_axi4_tpv_m (awaddr_chiplink_slv_axi4_tpv),
  .awlen_chiplink_slv_axi4_tpv_m (awlen_chiplink_slv_axi4_tpv),
  .awsize_chiplink_slv_axi4_tpv_m (awsize_chiplink_slv_axi4_tpv),
  .awburst_chiplink_slv_axi4_tpv_m (awburst_chiplink_slv_axi4_tpv),
  .awlock_chiplink_slv_axi4_tpv_m (awlock_chiplink_slv_axi4_tpv),
  .awcache_chiplink_slv_axi4_tpv_m (awcache_chiplink_slv_axi4_tpv),
  .awprot_chiplink_slv_axi4_tpv_m (awprot_chiplink_slv_axi4_tpv),
  .awvalid_chiplink_slv_axi4_tpv_m (awvalid_chiplink_slv_axi4_tpv),
  .awready_chiplink_slv_axi4_tpv_m (awready_chiplink_slv_axi4_tpv),
  .wdata_chiplink_slv_axi4_tpv_m (wdata_chiplink_slv_axi4_tpv),
  .wstrb_chiplink_slv_axi4_tpv_m (wstrb_chiplink_slv_axi4_tpv),
  .wlast_chiplink_slv_axi4_tpv_m (wlast_chiplink_slv_axi4_tpv),
  .wvalid_chiplink_slv_axi4_tpv_m (wvalid_chiplink_slv_axi4_tpv),
  .wready_chiplink_slv_axi4_tpv_m (wready_chiplink_slv_axi4_tpv),
  .bid_chiplink_slv_axi4_tpv_m (bid_chiplink_slv_axi4_tpv),
  .bresp_chiplink_slv_axi4_tpv_m (bresp_chiplink_slv_axi4_tpv),
  .bvalid_chiplink_slv_axi4_tpv_m (bvalid_chiplink_slv_axi4_tpv),
  .bready_chiplink_slv_axi4_tpv_m (bready_chiplink_slv_axi4_tpv),
  .arid_chiplink_slv_axi4_tpv_m (arid_chiplink_slv_axi4_tpv),
  .araddr_chiplink_slv_axi4_tpv_m (araddr_chiplink_slv_axi4_tpv),
  .arlen_chiplink_slv_axi4_tpv_m (arlen_chiplink_slv_axi4_tpv),
  .arsize_chiplink_slv_axi4_tpv_m (arsize_chiplink_slv_axi4_tpv),
  .arburst_chiplink_slv_axi4_tpv_m (arburst_chiplink_slv_axi4_tpv),
  .arlock_chiplink_slv_axi4_tpv_m (arlock_chiplink_slv_axi4_tpv),
  .arcache_chiplink_slv_axi4_tpv_m (arcache_chiplink_slv_axi4_tpv),
  .arprot_chiplink_slv_axi4_tpv_m (arprot_chiplink_slv_axi4_tpv),
  .arvalid_chiplink_slv_axi4_tpv_m (arvalid_chiplink_slv_axi4_tpv),
  .arready_chiplink_slv_axi4_tpv_m (arready_chiplink_slv_axi4_tpv),
  .rid_chiplink_slv_axi4_tpv_m (rid_chiplink_slv_axi4_tpv),
  .rdata_chiplink_slv_axi4_tpv_m (rdata_chiplink_slv_axi4_tpv),
  .rresp_chiplink_slv_axi4_tpv_m (rresp_chiplink_slv_axi4_tpv),
  .rlast_chiplink_slv_axi4_tpv_m (rlast_chiplink_slv_axi4_tpv),
  .rvalid_chiplink_slv_axi4_tpv_m (rvalid_chiplink_slv_axi4_tpv),
  .rready_chiplink_slv_axi4_tpv_m (rready_chiplink_slv_axi4_tpv),
  .awid_nic400_axi4_chiplink_s (awid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awaddr_nic400_axi4_chiplink_s (awaddr_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awlen_nic400_axi4_chiplink_s (awlen_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awsize_nic400_axi4_chiplink_s (awsize_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awburst_nic400_axi4_chiplink_s (awburst_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awlock_nic400_axi4_chiplink_s (awlock_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awcache_nic400_axi4_chiplink_s (awcache_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awprot_nic400_axi4_chiplink_s (awprot_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awvalid_nic400_axi4_chiplink_s (awvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awready_nic400_axi4_chiplink_s (awready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .wdata_nic400_axi4_chiplink_s (wdata_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .wstrb_nic400_axi4_chiplink_s (wstrb_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .wlast_nic400_axi4_chiplink_s (wlast_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .wvalid_nic400_axi4_chiplink_s (wvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .wready_nic400_axi4_chiplink_s (wready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .bid_nic400_axi4_chiplink_s (bid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .bresp_nic400_axi4_chiplink_s (bresp_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .bvalid_nic400_axi4_chiplink_s (bvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .bready_nic400_axi4_chiplink_s (bready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arid_nic400_axi4_chiplink_s (arid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .araddr_nic400_axi4_chiplink_s (araddr_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arlen_nic400_axi4_chiplink_s (arlen_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arsize_nic400_axi4_chiplink_s (arsize_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arburst_nic400_axi4_chiplink_s (arburst_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arlock_nic400_axi4_chiplink_s (arlock_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arcache_nic400_axi4_chiplink_s (arcache_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arprot_nic400_axi4_chiplink_s (arprot_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arvalid_nic400_axi4_chiplink_s (arvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arready_nic400_axi4_chiplink_s (arready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rid_nic400_axi4_chiplink_s (rid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rdata_nic400_axi4_chiplink_s (rdata_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rresp_nic400_axi4_chiplink_s (rresp_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rlast_nic400_axi4_chiplink_s (rlast_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rvalid_nic400_axi4_chiplink_s (rvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rready_nic400_axi4_chiplink_s (rready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .aclk                 (clk_peri_25mclk),
  .aresetn              (clk_peri_25mresetn)
);


nic400_amib_tpv_gp_apb4_ysyx_rv32     u_amib_tpv_gp_apb4 (
  .paddr_i2s_slv_apb4   (paddr_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pwdata_i2s_slv_apb4  (pwdata_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pwrite_i2s_slv_apb4  (pwrite_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pprot_i2s_slv_apb4   (pprot_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pstrb_i2s_slv_apb4   (pstrb_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .penable_i2s_slv_apb4 (penable_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .psel_i2s_slv_apb4    (pselx_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .prdata_i2s_slv_apb4  (prdata_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pslverr_i2s_slv_apb4 (pslverr_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pready_i2s_slv_apb4  (pready_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .apb_pclken           (clk_peri_25mclken),
  .aid_slave_11_s       (aid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aaddr_slave_11_s     (aaddr_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .alen_slave_11_s      (alen_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .asize_slave_11_s     (asize_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aburst_slave_11_s    (aburst_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .alock_slave_11_s     (alock_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .acache_slave_11_s    (acache_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aprot_slave_11_s     (aprot_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .awrite_slave_11_s    (awrite_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .avalid_slave_11_s    (avalid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aregion_slave_11_s   (aregion_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aready_slave_11_s    (aready_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .wdata_slave_11_s     (wdata_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .wstrb_slave_11_s     (wstrb_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .wlast_slave_11_s     (wlast_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .wvalid_slave_11_s    (wvalid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .wready_slave_11_s    (wready_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .did_slave_11_s       (did_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .ddata_slave_11_s     (ddata_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .dresp_slave_11_s     (dresp_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .dlast_slave_11_s     (dlast_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .dbnr_slave_11_s      (dbnr_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .dvalid_slave_11_s    (dvalid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .dready_slave_11_s    (dready_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aclk                 (clk_peri_25mclk),
  .aresetn              (clk_peri_25mresetn),
  .paddr_spfs_slv_apb4_tpv (paddr_spfs_slv_apb4_tpv),
  .pwdata_spfs_slv_apb4_tpv (pwdata_spfs_slv_apb4_tpv),
  .pwrite_spfs_slv_apb4_tpv (pwrite_spfs_slv_apb4_tpv),
  .pprot_spfs_slv_apb4_tpv (pprot_spfs_slv_apb4_tpv),
  .pstrb_spfs_slv_apb4_tpv (pstrb_spfs_slv_apb4_tpv),
  .penable_spfs_slv_apb4_tpv (penable_spfs_slv_apb4_tpv),
  .psel_spfs_slv_apb4_tpv (pselx_spfs_slv_apb4_tpv),
  .prdata_spfs_slv_apb4_tpv (prdata_spfs_slv_apb4_tpv),
  .pslverr_spfs_slv_apb4_tpv (pslverr_spfs_slv_apb4_tpv),
  .pready_spfs_slv_apb4_tpv (pready_spfs_slv_apb4_tpv),
  .paddr_uart_slv_apb4_tpv (paddr_uart_slv_apb4_tpv),
  .pwdata_uart_slv_apb4_tpv (pwdata_uart_slv_apb4_tpv),
  .pwrite_uart_slv_apb4_tpv (pwrite_uart_slv_apb4_tpv),
  .pprot_uart_slv_apb4_tpv (pprot_uart_slv_apb4_tpv),
  .pstrb_uart_slv_apb4_tpv (pstrb_uart_slv_apb4_tpv),
  .penable_uart_slv_apb4_tpv (penable_uart_slv_apb4_tpv),
  .psel_uart_slv_apb4_tpv (pselx_uart_slv_apb4_tpv),
  .prdata_uart_slv_apb4_tpv (prdata_uart_slv_apb4_tpv),
  .pslverr_uart_slv_apb4_tpv (pslverr_uart_slv_apb4_tpv),
  .pready_uart_slv_apb4_tpv (pready_uart_slv_apb4_tpv)
);


nic400_ib_chiplink_slv_axi4_tpv_ib_master_domain_ysyx_rv32     u_ib_chiplink_slv_axi4_tpv_ib_m (
  .awid_axi4_m          (awid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awaddr_axi4_m        (awaddr_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awlen_axi4_m         (awlen_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awsize_axi4_m        (awsize_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awburst_axi4_m       (awburst_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awlock_axi4_m        (awlock_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awcache_axi4_m       (awcache_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awprot_axi4_m        (awprot_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awvalid_axi4_m       (awvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .awregion_axi4_m      (),
  .awready_axi4_m       (awready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .wdata_axi4_m         (wdata_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .wstrb_axi4_m         (wstrb_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .wlast_axi4_m         (wlast_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .wvalid_axi4_m        (wvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .wready_axi4_m        (wready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .bid_axi4_m           (bid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .bresp_axi4_m         (bresp_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .bvalid_axi4_m        (bvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .bready_axi4_m        (bready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arid_axi4_m          (arid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .araddr_axi4_m        (araddr_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arlen_axi4_m         (arlen_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arsize_axi4_m        (arsize_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arburst_axi4_m       (arburst_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arlock_axi4_m        (arlock_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arcache_axi4_m       (arcache_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arprot_axi4_m        (arprot_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arvalid_axi4_m       (arvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .arregion_axi4_m      (),
  .arready_axi4_m       (arready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rid_axi4_m           (rid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rdata_axi4_m         (rdata_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rresp_axi4_m         (rresp_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rlast_axi4_m         (rlast_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rvalid_axi4_m        (rvalid_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .rready_axi4_m        (rready_chiplink_slv_axi4_tpv_ib_chiplink_slv_axi4_tpv_nic400_axi4_chiplink_s),
  .aclk_m               (clk_peri_25mclk),
  .aresetn_m            (clk_peri_25mresetn),
  .aw_data_async        (aw_data_chiplink_slv_axi4_tpv_ib_int_async),
  .aw_rpntr_gry_async   (aw_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async),
  .aw_rpntr_bin         (aw_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async),
  .aw_wpntr_gry_async   (aw_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async),
  .b_data_async         (b_data_chiplink_slv_axi4_tpv_ib_int_async),
  .b_rpntr_gry_async    (b_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async),
  .b_rpntr_bin          (b_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async),
  .b_wpntr_gry_async    (b_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async),
  .ar_data_async        (ar_data_chiplink_slv_axi4_tpv_ib_int_async),
  .ar_rpntr_gry_async   (ar_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async),
  .ar_rpntr_bin         (ar_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async),
  .ar_wpntr_gry_async   (ar_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async),
  .r_data_async         (r_data_chiplink_slv_axi4_tpv_ib_int_async),
  .r_rpntr_gry_async    (r_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async),
  .r_rpntr_bin          (r_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async),
  .r_wpntr_gry_async    (r_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async),
  .w_data_async         (w_data_chiplink_slv_axi4_tpv_ib_int_async),
  .w_rpntr_gry_async    (w_rpntr_gry_chiplink_slv_axi4_tpv_ib_int_async),
  .w_rpntr_bin          (w_rpntr_bin_chiplink_slv_axi4_tpv_ib_int_async),
  .w_wpntr_gry_async    (w_wpntr_gry_chiplink_slv_axi4_tpv_ib_int_async)
);


nic400_ib_dma_axi4_cpu_ib_slave_domain_ysyx_rv32     u_ib_dma_axi4_cpu_ib_s (
  .awid_axi4_s          (awid_dma_axi4_cpu_s),
  .awaddr_axi4_s        (awaddr_dma_axi4_cpu_s),
  .awlen_axi4_s         (awlen_dma_axi4_cpu_s),
  .awsize_axi4_s        (awsize_dma_axi4_cpu_s),
  .awburst_axi4_s       (awburst_dma_axi4_cpu_s),
  .awlock_axi4_s        (awlock_dma_axi4_cpu_s),
  .awcache_axi4_s       (awcache_dma_axi4_cpu_s),
  .awprot_axi4_s        (awprot_dma_axi4_cpu_s),
  .awvalid_axi4_s       (awvalid_dma_axi4_cpu_s),
  .awready_axi4_s       (awready_dma_axi4_cpu_s),
  .wdata_axi4_s         (wdata_dma_axi4_cpu_s),
  .wstrb_axi4_s         (wstrb_dma_axi4_cpu_s),
  .wlast_axi4_s         (wlast_dma_axi4_cpu_s),
  .wvalid_axi4_s        (wvalid_dma_axi4_cpu_s),
  .wready_axi4_s        (wready_dma_axi4_cpu_s),
  .bid_axi4_s           (bid_dma_axi4_cpu_s),
  .bresp_axi4_s         (bresp_dma_axi4_cpu_s),
  .bvalid_axi4_s        (bvalid_dma_axi4_cpu_s),
  .bready_axi4_s        (bready_dma_axi4_cpu_s),
  .arid_axi4_s          (arid_dma_axi4_cpu_s),
  .araddr_axi4_s        (araddr_dma_axi4_cpu_s),
  .arlen_axi4_s         (arlen_dma_axi4_cpu_s),
  .arsize_axi4_s        (arsize_dma_axi4_cpu_s),
  .arburst_axi4_s       (arburst_dma_axi4_cpu_s),
  .arlock_axi4_s        (arlock_dma_axi4_cpu_s),
  .arcache_axi4_s       (arcache_dma_axi4_cpu_s),
  .arprot_axi4_s        (arprot_dma_axi4_cpu_s),
  .arvalid_axi4_s       (arvalid_dma_axi4_cpu_s),
  .arready_axi4_s       (arready_dma_axi4_cpu_s),
  .rid_axi4_s           (rid_dma_axi4_cpu_s),
  .rdata_axi4_s         (rdata_dma_axi4_cpu_s),
  .rresp_axi4_s         (rresp_dma_axi4_cpu_s),
  .rlast_axi4_s         (rlast_dma_axi4_cpu_s),
  .rvalid_axi4_s        (rvalid_dma_axi4_cpu_s),
  .rready_axi4_s        (rready_dma_axi4_cpu_s),
  .aclk_s               (clk_peri_25mclk),
  .aresetn_s            (clk_peri_25mresetn),
  .aw_data_async        (aw_data_dma_axi4_cpu_ib_int_async),
  .aw_rpntr_gry_async   (aw_rpntr_gry_dma_axi4_cpu_ib_int_async),
  .aw_rpntr_bin         (aw_rpntr_bin_dma_axi4_cpu_ib_int_async),
  .aw_wpntr_gry_async   (aw_wpntr_gry_dma_axi4_cpu_ib_int_async),
  .b_data_async         (b_data_dma_axi4_cpu_ib_int_async),
  .b_rpntr_gry_async    (b_rpntr_gry_dma_axi4_cpu_ib_int_async),
  .b_rpntr_bin          (b_rpntr_bin_dma_axi4_cpu_ib_int_async),
  .b_wpntr_gry_async    (b_wpntr_gry_dma_axi4_cpu_ib_int_async),
  .ar_data_async        (ar_data_dma_axi4_cpu_ib_int_async),
  .ar_rpntr_gry_async   (ar_rpntr_gry_dma_axi4_cpu_ib_int_async),
  .ar_rpntr_bin         (ar_rpntr_bin_dma_axi4_cpu_ib_int_async),
  .ar_wpntr_gry_async   (ar_wpntr_gry_dma_axi4_cpu_ib_int_async),
  .r_data_async         (r_data_dma_axi4_cpu_ib_int_async),
  .r_rpntr_gry_async    (r_rpntr_gry_dma_axi4_cpu_ib_int_async),
  .r_rpntr_bin          (r_rpntr_bin_dma_axi4_cpu_ib_int_async),
  .r_wpntr_gry_async    (r_wpntr_gry_dma_axi4_cpu_ib_int_async),
  .w_data_async         (w_data_dma_axi4_cpu_ib_int_async),
  .w_rpntr_gry_async    (w_rpntr_gry_dma_axi4_cpu_ib_int_async),
  .w_rpntr_bin          (w_rpntr_bin_dma_axi4_cpu_ib_int_async),
  .w_wpntr_gry_async    (w_wpntr_gry_dma_axi4_cpu_ib_int_async)
);


nic400_ib_tpv_gp_apb4_ib_master_domain_ysyx_rv32     u_ib_tpv_gp_apb4_ib_m (
  .aid_itb_m            (aid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aaddr_itb_m          (aaddr_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .alen_itb_m           (alen_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .asize_itb_m          (asize_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aburst_itb_m         (aburst_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .alock_itb_m          (alock_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .acache_itb_m         (acache_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aprot_itb_m          (aprot_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .awrite_itb_m         (awrite_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .avalid_itb_m         (avalid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aregion_itb_m        (aregion_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aready_itb_m         (aready_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .wdata_itb_m          (wdata_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .wstrb_itb_m          (wstrb_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .wlast_itb_m          (wlast_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .wvalid_itb_m         (wvalid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .wready_itb_m         (wready_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .did_itb_m            (did_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .ddata_itb_m          (ddata_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .dresp_itb_m          (dresp_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .dlast_itb_m          (dlast_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .dbnr_itb_m           (dbnr_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .dvalid_itb_m         (dvalid_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .dready_itb_m         (dready_tpv_gp_apb4_ib_tpv_gp_apb4_slave_11_s),
  .aclk_m               (clk_peri_25mclk),
  .aresetn_m            (clk_peri_25mresetn),
  .a_data_async         (a_data_tpv_gp_apb4_ib_int_async),
  .a_rpntr_gry_async    (a_rpntr_gry_tpv_gp_apb4_ib_int_async),
  .a_rpntr_bin          (a_rpntr_bin_tpv_gp_apb4_ib_int_async),
  .a_wpntr_gry_async    (a_wpntr_gry_tpv_gp_apb4_ib_int_async),
  .d_data_async         (d_data_tpv_gp_apb4_ib_int_async),
  .d_rpntr_gry_async    (d_rpntr_gry_tpv_gp_apb4_ib_int_async),
  .d_rpntr_bin          (d_rpntr_bin_tpv_gp_apb4_ib_int_async),
  .d_wpntr_gry_async    (d_wpntr_gry_tpv_gp_apb4_ib_int_async),
  .w_data_async         (w_data_tpv_gp_apb4_ib_int_async),
  .w_rpntr_gry_async    (w_rpntr_gry_tpv_gp_apb4_ib_int_async),
  .w_rpntr_bin          (w_rpntr_bin_tpv_gp_apb4_ib_int_async),
  .w_wpntr_gry_async    (w_wpntr_gry_tpv_gp_apb4_ib_int_async)
);


nic400_apb_bridge_slave_domain_ysyx_rv32     u_tpv_gp_apb4_i2s_slv_apb4_bsd_async (
  .paddrs               (paddr_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pwdatas              (pwdata_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pwrites              (pwrite_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .penables             (penable_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .psels                (pselx_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .prdatas              (prdata_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pslverrs             (pslverr_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .preadys              (pready_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pclks                (clk_peri_25mclk),
  .pclkens              (clk_peri_25mclken),
  .presetsn             (clk_peri_25mresetn),
  .pprots               (pprot_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .pstrbs               (pstrb_tpv_gp_apb4_i2s_slv_apb4_bridge),
  .apbm_req_async       (preq_i2s_slv_apb4_int_slave_async),
  .apbm_ack_async       (pack_i2s_slv_apb4_int_slave_async),
  .apbm_fwd_data_async  (pfwdpayld_i2s_slv_apb4_int_slave_async),
  .apbm_rev_data_async  (prevpayld_i2s_slv_apb4_int_slave_async)
);



endmodule
